User Guide

This page demonstrates practical PCB Auto Router operations through a real project, showcasing how to open design files, perform routing, configure rules, manage differential pairs, and save results.

Preparation

Before using PcbAutoRouter, you need to complete design rule configuration and DSN file export in your EDA tool.

Setting Routing Rules

Rule settings directly impact routing completion rate. Ensure the following settings in your EDA tool:

KiCad: - Click menu: Board Setup → Design Rules → Net Classes - Configure Trace Width, Clearance, Via Diameter

JLCEDA: - Click menu: Design → Design Rules - Configure Trace Width, Safety Clearance, Via Size

Tip: Overly strict rules (thick traces, large clearance, oversized vias) result in low routing completion. Start with looser rules and tighten them iteratively.

Exporting DSN File

KiCad Export: - Open PCB Editor, click: File → Export → Specctra DSN...

JLCEDA Export: - Open PCB Design Tool, click: File → Export → Auto Routing(DSN)...

After successful export, you'll get a .dsn file containing all routing-related design information.

Routing Operations

Step 1: Open Design File and Check Rules

  1. Start PcbAutoRouter, click "Open File" button and select the exported DSN file.
  2. A "Rules Exceed Limit" warning may appear. Click OK to ignore and continue (this means EDA rules are conservative).

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3.Press F5 to start automatic routing and observe the result. You'll notice vias and trace widths are indeed too large.

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Note: Via size is predefined in the DSN file. PcbAutoRouter cannot change it unilaterally. To adjust, return to your EDA tool, modify rules, and re-export.

Step 2: Manually Adjust Rules

  1. Return to EDA tool and open the design rules window.
  2. Adjust rules based on routing results (e.g., increase trace width, reduce clearance, adjust via sizes).
  3. For specific nets (e.g., power nets), you can set larger vias.
  4. Re-export the DSN file and open it in PcbAutoRouter.
  5. Execute routing again to observe the improvements.

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This time, vias follow EDA rules exactly, with varying sizes as appropriate.

Step 3: Adjust Layout to Optimize Routing

  1. Continue full auto-routing and observe congested areas.

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2.You may notice that IC pins on the top layer and RGB connectors on the bottom layer are in the same region, making via placement difficult. Return to EDA tool to reposition components and improve routing topology.

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3.Re-export and perform routing in PcbAutoRouter, iterating until satisfied.

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The layout is much better now; most unrouted nets simply lack proper via placement.

Important: Avoid clicking "Stop" during routing, as this leaves incomplete routing state.

Step 4: Batch Adjust Vias

  1. Manually add vias to achieve 100% routing completion. Use shortcuts: Alt+Left Click on any pad, trace, or via to pick via parameters; Ctrl+Left Click to place a via. Afterwards, Ctrl+Left Click returns to single-net routing mode.

You can add one via then immediately single-net route:

Or batch add vias then use F5 for full auto-routing. You can freely delete traces and auto-routing adjusts automatically:

As long as layout and via placement are reasonable, auto-routing always produces suitable results.

2.Try adding vias to improve routed paths that take detours:

3.After routing completes, use Ctrl+T to clear all traces while keeping vias.

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4.Manually drag vias to reasonable positions to optimize overall layout aesthetics.

5.Execute routing again to check for improvements.

Step 5: Fine Tune Traces

  1. For areas with suboptimal routing, drag traces directly to correct them:

2.Vias can be dragged to move them; traces automatically adjust without disconnecting:

Step 6: Export SES File

Once satisfied with the routing results, export the SES file back to your EDA tool to complete the entire auto-routing workflow.